This paper presents a novel approach to counterbalance free-carrier-absorption (FCA) in electro-optic (E-O) Mach–Zehnder interferometer (MZI) cells by harnessing the self-heating effect. We show insights on crosstalk limitations in MZIs with direct carrier-injection and provide a detailed design methodology on a differential phase shifter pair. Leveraging both free-carrier dispersion (FCD) and self-heating effects, our design enables arbitrary phase tuning with balanced FCA loss in the pair of arms, eliminating the need for additional phase corrections and creating ultralow crosstalk MZI elements. This neat design disengages from the commonly used nested structure, thus providing an opportunity of embedding tunable couplers for correcting imperfect splitting ratios given that only two are needed. We show that with the use of tunable directional couplers, a standard ±10nm process variation is tolerated, while achieving a crosstalk ratio below -40dB. By direct carrier injection in both arms, the proposed device operates at nanosecond scales and can bring about a breakthrough in the scalability of E-O switch fabrics, as well as other silicon integrated circuits that have stringent requirements for crosstalk leakage.

An N×N iterative photonic processor is proposed for the first time, we believe, for fast computation of complex-valued matrix inversion, a fundamental but computationally expensive linear algebra operation. Compared to traditional digital electronic processing, optical signal processing has a few unparalleled features that could enable higher representational efficiency and faster computing speed. The proposed processor is based on photonic integration platforms–the inclusion of III-V gain blocks offers net neutral loss in the phase-sensitive loops. This is essential for the Richardson iteration method that is adopted in this paper for complex linear systems. Wavelength multiplexing can be used to significantly improve the processing efficiency, allowing the computation of multiple columns of the inverse matrix using a single processor core. Performances of the key building blocks are modeled and simulated, followed by a system-level analysis, which serves as a guideline for designing an N×N Richardson iteration processor. An inversion accuracy of >98% can be predicted for a 64×64 photonic processor with a >80 times faster inversion rate than electronic processors. Including the power consumed by both active components and electronic circuits, the power efficiency of the proposed processor is estimated to be over an order of magnitude more energy-efficient than electronic processors. The proposed iterative photonic integrated processor provides a promising solution for future optical signal processing systems.

We present a compact, highly tolerant vertical coupling structure, which can be a generic design that bridges the gap between conventional resonant couplers and adiabatic couplers for heterogeneously integrated devices. We show insights on relaxing the coupler alignment tolerance and provide a detailed design methodology. By the use of a multisegmented inverse taper structure, our design allows a certain proportion of the odd supermode to be excited during the coupling process, which simultaneously facilitates high tolerance and compactness. With a total length of 87 μm, our coupler is almost threefold shorter than the state-of-the-art alignment-tolerant adiabatic couplers and outperforms them by demonstrating a more than 94% coupling efficiency (for <0.3dB coupling loss) with ±1μm misalignment tolerance, which, to our best knowledge, is a new record for III-V-on-silicon vertical couplers. Furthermore, our design has high tolerance to fabrication-induced structural deformation and ultrabroad bandwidth. These features make it particularly suitable for building densely integrated III-V-on-silicon photonic circuits with commercially available microtransfer printing assembly tools. The proposed design can be widely adopted in various integration platforms.

We report on the first monolithically integrated microring-based optical switch in the switch-and-select architecture. The switch fabric delivers strictly non-blocking connectivity while completely canceling the first-order crosstalk. The 4×4 switching circuit consists of eight silicon microring-based spatial (de-)multiplexers interconnected by a Si/SiN dual-layer crossing-free central shuffle. Analysis of the on-state and off-state power transfer functions reveals the extinction ratios of individual ring resonators exceeding 25 dB, leading to switch crosstalk suppression of up to over 50 dB in the switch-and-select topology. Optical paths are assessed, showing losses as low as 0.1 dB per off-resonance ring and 0.5 dB per on-resonance ring. Photonic switching is actuated with integrated micro-heaters to give an ～24 GHz passband. The fully packaged device is flip-chip bonded onto a printed circuit board breakout board with a UV-curved fiber array.